Senior FPGA Engineer

Spire Global is currently embarking on projects that range from the design of advanced satellite communication systems to networking satellite constellations.

As part of the development of next-generation proprietary communication system, we are seeking a Senior FPGA Engineer. The ideal candidate will have hands-on experience and deep expertise in FPGA programming as well as a communication background. Understanding of communication or information theory or experience with communication systems and space industry will be a plus. The candidate will have strong analytical and problem-solving skills. He will be able to navigate in a fast-changing dynamic and innovative environment. He should be familiar with communications and software-defined radio techniques.

The role requires the ability to work within a complex architecture and generate highly optimized solutions. A high standard of excellence and effectiveness, with an anticipation of correct deliverables on the first attempt, is expected.

Key Responsibilities:

• Proactively contribute to the design and development of FPGA-based solutions for our next-generation of satellite communication systems.
• Collaborate effectively with cross-functional teams across multiple time zones, including FPGA, hardware, RF, antenna, DSP and software engineers to define system requirements and architecture.
• Implement and optimize FPGA algorithms for signal processing and various aspects of the digital communication stack.
• Conduct FPGA synthesis, place and route, and timing closure to meet performance targets.
• Perform FPGA verification and validation using simulation tools and hardware-in-the-loop testing.
• Troubleshoot and debug FPGA designs, identifying and resolving issues in a high-paced environment.
• Stay current with industry trends and advancements in FPGA technology and radio communications.

Qualifications / Experience:

• Understanding of communication theory and signal processing algorithm design (OFDM, spread spectrum, timing recovery, signal estimation and detection, MIMO techniques and beamforming, automatic gain control, pre-compensation, FEC and coding theory, channel estimation).
• Proficiency in (preferably) VHDL although Verilog will be considered.
• Experience with FPGA synthesis tools (e.g., Xilinx/AMD Vivado, Intel Quartus Prime). and simulation tools (e.g., GHDL, ModelSim, Questa, COCOTB).
• Experience of Xilinx/AMD MPSoC/RFSoC.
• Proficiency in scripting languages and testing tools (Python, TCL).
• Experience in HW design for high-performance multi-channel baseband processing.
• Data-driven and evidence-based work methodology.

Desired skills:

• Knowledge in existing wireless communication standards such as DVB-S2(X) protocols, CCSDS family of protocols, 3GPP (5G/4G-LTE/WCDMA/UMTS/GSM) or WiFi families, (802.11a/b/g/n/ac/ax/be/ad/ay), or Bluetooth.
• Experience in HW design for MIMO applications, high-speed ADCs, or multiple FPGAs.
• Competency with RF/wireless test and measurement laboratory equipment.
• RF hardware design experience in frontend design, antenna design, etc.
• Experience of version control tools (e.g., Git).
• Experience in Github Actions (GHA) and CI in general.
• Experience and knowledge of High-Level Synthesis (HLS), emulation systems and virtual platforms.
• Experience with C/C++ and/or Matlab for algorithm development, modelling and simulations.